clock flip-flop
基本解释
- [电子、通信与自动控制技术]时钟触发器
英汉例句
- With the mechanism of clock flip- flop, data can be extracted automatically.
系统采用时钟触发机制实现了数据的自动抽取过程; - Especially, the clock-racing multi-threshold flip-flop can decreases the leakage power and the power dissipation of clock network.
特别是多阈值时钟竞争型触发器,不仅可以降低电路的漏电流功耗,还能降低电路的时钟网络的功耗。 - The results of simulation suggest that the designed FK-LSCDFF has correct logic function, and reduces 17% powedissipation compared with conventional low-swing clock double-edge-triggered flip-flop.
模拟结果表明所设计的触发器具有正确的逻辑功能,跟传统的时钟低摆幅双边沿触发器相比,降低近17%的功耗。
双语例句
词组短语
- Clock k flip -flop 时钟触发器
- clock flip -flop detail 时钟触发器
- clock -pulse set-reset flip-flop 时钟脉冲置位
短语
专业释义
- 时钟触发器