clocked logic
基本解释
- 时钟门电路
英汉例句
- Based on the working principle, counter structure and Clocked Transmission Gate Adiabatic Logic circuits, a design scheme of decimal counter with reset is proposed.
通过对计数器和钟控传输门绝热逻辑电路工作原理及结构的研究,提出一种带复位功能的低功耗十进制计数器设计方案。
双语例句
词组短语
- clocked sequential logic 时钟式序列逻辑
- Clocked Static Logic 时钟静态逻辑
- hase clocked logic 多相时钟逻辑
- multi -hase clocked logic 多相时钟逻辑
- Clocked Transmission Gate Adiabatic Logic 钟控传输门绝热逻辑
短语
专业释义
- 时标逻辑
- 时钟逻辑